I have listed here some of the good topics which can you prefer as your reference for your knowledge or term paper submission or assignment from your college. Here each and every topics have some significant to our subject like Digital System or Electronics system or any electronics subjects.
Topics are as followed..
Topics are as followed..
| TP on High performance computing using FPGA |
| 32-bit ALU design using VHDL |
| 4 bit MIPS ALU |
| 4 X 4 array multiplier |
| ABEL |
| AHDL |
| Algorithm for multiplication |
| Algorithm for state reduction |
| Algorithm for state reduction |
| Algorithm of floating point multiplier |
| Algorithm of KMAP |
| Algoritm for state reduction |
| Architecture and classes of FPGA |
| Architecture of CPLD |
| Architecture of FPGA and CPLD |
| Architecture of FPGA array |
| Archtitecture of FPGA and XILINX overview |
| Archtitecture of PLD |
| BARREL SHIFTER |
| Basic Architecture of FPGA |
| Comparision between Verilog and VHDL |
| comparison of cpld manufacture by different brands |
| CPLD architecture |
| Design and implementation of digital clock |
| Divison algorithm and hardware |
| FPGA Architecture |
| FPGA architecture & Actel FPGA |
| FPGA market survey advancement |
| FPGA programming technology |
| FPGA routing algorithm |
| High performance computing using FPGA |
| Higher order binary multiplier with improved speed |
| implemenation of 16 bit RISC on Spartan -3 |
| Implemenation of 4-bit array multiplier on CPLD |
| Implemenation of 4-bit array multiplier onspartan |
| Implemenation of divider on CPLD |
| Market survey of FPGA advancement |
| Method to skip excitation tables for SR, JK, T - FF |
| Mulitiplication Alogritm and hardware |
| Multiplication Algorithm |
| PLD architectures |
| Review of Verilog |
| Shift and ADD multiplier |
| simple PLDS |
| state assingment of fsm using genetic algorithm |
| State reduction and assingment |
| synchronization in DSD |
| Tripych fapga archtiecture |
| Various K map Algorithm |
